Semiconductor Engineering

HARP: Practically and Effectively Identifying Uncorrectable Errors in Memory Chips That Use On-Die Error-Correcting Codes

Hybrid Active-Reactive Profiling (HARP), a new error profiling algorithm that rapidly achieves full coverage of at-risk bits in memory chips that use on-die ECC ...
Design-Reuse

Efficient methodology for design and verification of Memory ECC error management logic in safety critical SoCs

Stringent safety requirements require SoC architects to focus more on implementing schemes to make the microcontrollers fail safe under all conditions. Also, as the chip complexity and size is growing ...
Ars Technica

Memory testing on ECC RAM - are ECC errors "ok"?

Hey C&MT, it's been a while for me. I'm putting together a passively-cooled Qotom system (Atom C3758R) to become a new OPNsense router... More accurately, it will probably run Proxmox, with the router ...
Electronic Design

Low-Density Parity Check Error Correction for Solid State Storage

Error Correcting Code (ECC) technology, such as Low-Density Parity Check codes, has been around longer than most of you reading this have been alive. The reason is ...